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| (R) TS3V556 3V LOW POWER DUAL TIMERS .DEDI .VERYLOWPOWERCONSUMPTI .WI .HI .SUPPLY .HI .PI .OUTPUT DESCRIPTION CATED TO 3.3V OR BATTERY SUPPLY (Specified at 3V and 5V) ON : 90 A/tim at VCC = 3V DE SINGLE SUPPLY RANGE : +2.7V to +16V GH OUTPUT CURRENT CAPABILITY CURRENT SPIKES REDUCED DURING OUTPUT TRANSITIONS GH INPUT IMPEDANCE : 1012 N-TO-PIN AND FUNCTIONALLY COMPATIBLE WITH BIPOLAR NE556 AND CMOS TS556 COMPATIBLE WITH TTL,CMOS AND LOGIC MOS N DIP14 (Plastic Package) D SO14 The TS3V556 with its low consumption (90A/tim at VCC = 3V) is a dual CMOS timer dedicated to 3.3V or battery supply(specified at 3V and 5V offering also a high frequency (f(max) 2MHz at VCC = 3V and 2.7 MHz at VCC = 5V). Thus, either in monostable or astable mode, timing remains very accurate. Timing capacitors can also be minimized due to high input impedance (1012 ). PIN CONNECTIONS (top view) ORDER CODES Part Number TS3V556I Temperature Range -40, +125 C o Package N l D l Discha rge 1 14 13 12 11 10 VC C D isc ha rge T h r e s h o ld 2 Co n t r o l Vo l t a g e 3 Th res ho ld Re se t 4 5 Co n t r o l Vo l t a g e Ou t p u t Re s e t Tr ig g e r 6 7 9 8 Out put Trigge r GND May 2000 1/8 TS3V556 BLOCK DIAGRAM (1/2 TS3V556) V CC 14 Reset 4 / 10 3V556 R 2 / 12 R1 + Threshold Control Voltage Q 5/9 Output R - A S 3 / 11 R + Trigger 6/8 - B 1 / 13 R 7 Discharge Ground FUNCTION TABLE RESET Low High High High TRIGGER x Low High High THRESHOLD x x High Low OUTPUT Low High Low Previous State LOW HIGH X Level Voltage Min voltage specified Level Voltage Max voltage specified Irrelevant ABSOLUTE MAXIMUM RATINGS Symbol VCC TJ Parameter Supply Voltage Junction Temperature Value +18 +150 Unit V o C THERMAL CHARACTERISTICS Symbol Toper Tstg Parameter Operating Temperature Range TS3V556I,AI Storage Temperature Range Value -40 to +125 -65 to +150 o Unit o C C OPERATING CONDITIONS Symbol VCC Supply Voltage Parameter Value +2.7 to +16 Unit V 2/8 TS3V556 ELECTRICAL CHARACTERISTICS VCC = +3V , Tamb = +25oC , Reset to VCC (unless otherwise specified) STATIC Symbol ICC Parameter Supply Current - (no load, High and Low States, per timer) Tamb = +25oC Tmin. (R) Tamb (R) Tmax. Control Voltage Tamb = +25oC Tmin. (R) Tamb (R) Tmax. Discharge Saturation Voltage (IDIS = 1mA) Tamb = +25oC Tmin. (R) Tamb (R) Tmax. Low Level Output Voltage (ISINK = 1mA) Tamb = +25oC Tmin. (R) Tamb (R) Tmax. High Level Output Voltage (ISOURCE = -0.3mA) Tamb = +25oC Tmin. (R) Tamb (R) Tmax. Trigger Voltage Tamb = +25oC Tmin. (R) Tamb (R) Tmax. Trigger Current Threshold Current Reset Voltage Tamb = +25C Tmin. (R) Tamb (R) Tmax. Reset Current Discharge Pin Leakage Current 1.8 1.7 Min. TS3V556I Typ. 90 Max. 230 230 Unit A VCL V 2 2.2 2.3 V 0.05 0.1 0.2 0.25 V 0.3 0.35 V 2.5 2.5 0.9 0.8 2.9 V 1 10 10 0.4 0.3 1.1 10 1 1.5 2.0 100 pA nA 1.1 1.2 pA pA V VDIS VOL VOH VTRIG ITRIG ITH VRESET IRESET IDIS DYNAMIC Symbol Parameter Timing Accuracy (Monostable) R = 10k , C = 0.1F - (note 1) Timing Shift with supply voltage variations (Monostable) R = 10k , C = 0.1F, V CC = +3V +/-0.3V - (note 1) Timing Shift with temperature - (note 1) Tmin. (R) Tamb (R) Tmax. Maximum astable frequency - (note 2) RA = 470 , RB = 200, C = 200pF Astable frequency accuracy - (note 2) RA = RB = 1k to 100k, C = 0.1F Timing Shift with supply voltage variations (Astable mode) - (note 2) RA = RB = 10k, C = 0.1F, VCC = +3 to+5V Output Rise Time (CLOAD = 10pF) Output Fall Time (CLOAD = 10pF) Trigger Propagation Delay Minimum Reset Pulse Width (V TRIG = +3V) 1. See Figure 2 2. See Figure 4 Min. TS3V556I Typ. Max. 1 Unit % %/V 0.5 75 2 % 5 %/V 0.5 25 20 100 350 ns ns ns ns ppm/ C MHz fmax tr tf tPD tRPW Note : 3/8 TS3V556 ELECTRICAL CHARACTERISTICS VCC = +5V , Tamb = +25oC , Reset to VCC (unless otherwise specified) STATIC Symbol ICC Parameter Supply Current - (no load, High and Low States, per timer) Tamb = +25C Tmin. (R) Tamb (R) Tmax. Control Voltage Tamb = +25C Tmin. (R) Tamb (R) Tmax. Discharge Saturation Voltage (IDIS = 10mA) Tamb = +25C Tmin. (R) Tamb (R) Tmax. Low Level Output Voltage (ISINK = 8mA) Tamb = +25C Tmin. (R) Tamb (R) Tmax. High Level Output Voltage (ISOURCE = -2mA) Tamb = +25C Tmin. (R) Tamb (R) Tmax. Trigger Voltage Tamb = +25C Tmin. (R) Tamb (R) Tmax. Trigger Current Threshold Current Reset Voltage Tamb = +25C Tmin. (R) Tamb (R) Tmax. Reset Current Discharge Pin Leakage Current Min. TS3V556I Typ. 110 Max. 250 250 Unit A VCL V 2.9 2.8 3.3 3.8 3.9 V 0.2 0.3 0.35 V 0.3 0.6 0.8 V 4.4 4.4 1.36 1.26 4.6 V 1.67 10 10 0.4 0.3 1.1 10 1 1.5 2.0 100 pA nA 1.96 2.06 pA pA V VDIS VOL VOH VTRIG ITRIG ITH VRESET IRESET IDIS DYNAMIC Symbol Parameter Timing Accuracy (Monostable) - (note1) R = 10k , C = 0.1F - (note 1) Timing Shift with supply voltage variations (Monostable) - (note1) R = 10k , C = 0.1F, V CC = +5V +/-1V Timing Shift with temperature - (note1) Tmin .(R) Tamb (R) Tmax. Maximum astable frequency - (note 2) RA = 470 , RB = 200, C = 200pF Astable frequency accuracy - (note 2) RA = RB = 1k to 100k, C = 0.1F Timing Shift with supply voltage variations (Astable mode) - (note 2) RA = RB = 10k, C = 0.1F, VCC = +5V to+12V Output Rise Time (CLOAD = 10pF) Output Fall Time (CLOAD = 10pF) Trigger Propagation Delay Minimum Reset Pulse Width (V TRIG = +5V) 1. See Figure 2 2. See Figure 4 Min. TS3V556I Typ. Max. 2 Unit % %/V 0.38 75 2.7 % 3 %/V 0.1 25 20 100 350 ns ns ns ns ppm/ C MHz fmax tr tf tPD tRPW Note : 4/8 TS3V556 TYPICAL CHARACTERISTICS The circuit triggers on a negative-going input signal when the level reaches 1/3 V CC. Once triggered,the circuit remains in this state until the set time has elapsed,even if it is triggered again during this interval. The duration of the output HIGH state is given by t = 1.1 R x C. Notice that since the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. Applying a negative pulse simultaneously to the Reset terminal (pin 4 or 10) and the Trigger terminal (pin 2 or 8) during the timing cycle discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. During the time the reset pulse is applied, the output is driven to its LOW state. When a negative trigger pulse is applied to the trigger terminal, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentiallywith the time constant = R x C. When the voltage across the capacitor equals 2/3 VCC, the comparator resets the flip-flop which then discharges the capacitor rapidly and drives the output to its LOW state. Figure 3 shows the actual waveforms generated in this mode of operation. When Reset is not used, it should be tied high to avoid any possible or false triggering. Figure 3 t = 0.1 ms / div INPUT = 2.0V/div C Figure 1 : 300 SUPPLY CURRENT, I CC( A) Supply Current (each timer) versus supply voltage. 200 100 0 4 8 12 16 SUPPLY VOLTAGE, V CC (V) APPLICATION INFORMATION MONOSTABLE OPERATION In the monostable mode,the timer functions as a one-shot. Referring to figure 2 the external capacitor is initially held discharged by a transistor inside the timer. Figure 2 VC C Reset R Trigger 1/2 TS3V556 Out Control Voltage 0.01F OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 2.0V/div R = 9.1k , C = 0.01 F , RL = 1.0k 5/8 TS3V556 ASTABLE OPERATION When the circuit is connected as shown in figure 4 , it triggers itself and free runs as a multivibrator. The external capacitor charges throughR A and R B and discharges through RB only. Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operation, C charges and discharges between 1/3 VCC and 2/3 VCC. As in the triggered mode, the charge and discharge times and therefore frequency, are independent of the supply voltage. Figure 5 shows actual waveforms generated in this Figure 4 VCC mode of operation. The charge time (output HIGH) is given by : t1 = 0.693 (RA + RB) C and the discharge time (output LOW) by : t2 = 0.693 (RB) C Thus the total period T is given by : T = t1 + t2 = 0.693 (RA + 2RB) C The frequency of oscillation is then : f= 1 144 . = T (RA + 2RB ) C RB RA + 2R B The duty cycle is given by : D = Figure 5 t = 0.5 ms / div OUTPUT VOLTAGE = 5.0V/div RA Reset Out TS3V556 Control Voltage 0.01 F RB C CAPACITOR VOLTAGE = 1.0V/div R = R = 4.8 k , C = 0.1 F , R L = 1.0k A B 6/8 TS3V556 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP Dimensions a1 B b b1 D E e e3 F i L Z Min. 0.51 1.39 Millimeters Typ. Max. 1.65 Min. 0.020 0.055 Inches Typ. Max. 0.065 0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050 0.020 0.010 0.787 0.335 0.100 0.600 0.280 0.201 0.130 0.100 7/8 TS3V556 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) Dimensions A a1 a2 b b1 C c1 D E e e3 F G L M S Min. 0.1 0.35 0.19 Millimeters Typ. Max. 1.75 0.2 1.6 0.46 0.25 o 45 (typ.) Min. 0.004 0.014 0.007 Inches Typ. Max. 0.069 0.008 0.063 0.018 0.010 0.5 8.55 5.8 1.27 7.62 3.8 4.6 0.5 4.0 5.3 1.27 0.68 o 8 (max.) 0.020 8.75 6.2 0.336 0.228 0.050 0.300 0.150 0.181 0.020 0.157 0.208 0.050 0.027 0.334 0.244 nformation furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. (c) http://www.st.com 8/8 |
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